; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637]
; commandline ArmCC [--list --debug -c --asm --interleave -o.\obj\motor.o --asm_dir=.\list\ --list_dir=.\list\ --depend=.\obj\motor.d --cpu=Cortex-M3 --apcs=interwork -O0 --diag_suppress=9931 -I.\FWlib\inc -I.\user -I.\CM3 -I.\dmp -I.\RTE\_STM32-FD -If:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -If:\Users\Administrator\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include -D__MICROLIB -D__UVISION_VERSION=530 -D_RTE_ -DSTM32F10X_MD -D_RTE_ -DUSE_STDPERIPH_DRIVER -DSTM32F10X_MD --omf_browse=.\obj\motor.crf user\motor.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  timer1_ini PROC
;;;19     ****************************************************************************/ 
;;;20     void timer1_ini(void)
000000  b51f              PUSH     {r0-r4,lr}
;;;21     {  
;;;22     
;;;23        GPIO_InitTypeDef GPIO_InitStructure;	   
;;;24     
;;;25        TIM_ICInitTypeDef TIM_ICInitStructure;    
;;;26     	 RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
000002  2101              MOVS     r1,#1
000004  02c8              LSLS     r0,r1,#11
000006  f7fffffe          BL       RCC_APB2PeriphClockCmd
;;;27     	
;;;28        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 |GPIO_Pin_9;						//AB
00000a  f44f7040          MOV      r0,#0x300
00000e  f8ad000c          STRH     r0,[sp,#0xc]
;;;29        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
000012  2048              MOVS     r0,#0x48
000014  f88d000f          STRB     r0,[sp,#0xf]
;;;30        GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
000018  2003              MOVS     r0,#3
00001a  f88d000e          STRB     r0,[sp,#0xe]
;;;31        GPIO_Init(GPIOA, &GPIO_InitStructure);
00001e  a903              ADD      r1,sp,#0xc
000020  48b2              LDR      r0,|L1.748|
000022  f7fffffe          BL       GPIO_Init
;;;32     	
;;;33        /*-------------------------------------------------------------------
;;;34       ģʽ 
;;;35       -------------------------------------------------------------------*/
;;;36       TIM1_TimeBaseStructure.TIM_Prescaler =0;// 719; //59;//2;			  //ԤƵTIM1_PSC=1 
000026  2000              MOVS     r0,#0
000028  49b1              LDR      r1,|L1.752|
00002a  8008              STRH     r0,[r1,#0]
;;;37       TIM1_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;		//ģʽЧɱӿڿ
00002c  8048              STRH     r0,[r1,#2]
;;;38       TIM1_TimeBaseStructure.TIM_Period =65535;	                      //ԶװؼĴTIM2_APRǷֹ     
00002e  f64f70ff          MOV      r0,#0xffff
000032  8088              STRH     r0,[r1,#4]
;;;39       TIM1_TimeBaseStructure.TIM_ClockDivision = 0x0;					        //ʱӷƵ TIM1_CR1[9:8]=00
000034  2000              MOVS     r0,#0
000036  80c8              STRH     r0,[r1,#6]
;;;40       
;;;41     	TIM1_TimeBaseStructure.TIM_RepetitionCounter = 0x0;
000038  7208              STRB     r0,[r1,#8]
;;;42     
;;;43       TIM_TimeBaseInit(TIM1,&TIM1_TimeBaseStructure);					//дTIM1Ĵ
00003a  48ae              LDR      r0,|L1.756|
00003c  f7fffffe          BL       TIM_TimeBaseInit
;;;44       
;;;45     	
;;;46     	
;;;47     	TIM_ICStructInit(&TIM_ICInitStructure);
000040  4668              MOV      r0,sp
000042  f7fffffe          BL       TIM_ICStructInit
;;;48     	TIM_ICInitStructure.TIM_Channel=TIM_Channel_1;                  
000046  2000              MOVS     r0,#0
000048  f8ad0000          STRH     r0,[sp,#0]
;;;49       //TIM_ICInitStructure.TIM_ICPolarity=TIM_ICPolarity_Rising;	      
;;;50       //TIM_ICInitStructure.TIM_ICSelection=TIM_ICSelection_DirectTI;   
;;;51       //TIM_ICInitStructure.TIM_ICPrescaler=TIM_ICPSC_DIV1;	            
;;;52       TIM_ICInitStructure.TIM_ICFilter =0x0f;                            
00004c  200f              MOVS     r0,#0xf
00004e  f8ad0008          STRH     r0,[sp,#8]
;;;53       TIM_ICInit(TIM1,&TIM_ICInitStructure);
000052  4669              MOV      r1,sp
000054  48a7              LDR      r0,|L1.756|
000056  f7fffffe          BL       TIM_ICInit
;;;54     	
;;;55     	TIM_ICInitStructure.TIM_Channel=TIM_Channel_2;                  
00005a  2004              MOVS     r0,#4
00005c  f8ad0000          STRH     r0,[sp,#0]
;;;56       //TIM_ICInitStructure.TIM_ICPolarity=TIM_ICPolarity_Rising;	      
;;;57       //TIM_ICInitStructure.TIM_ICSelection=TIM_ICSelection_DirectTI;   
;;;58       //TIM_ICInitStructure.TIM_ICPrescaler=TIM_ICPSC_DIV1;	            
;;;59       TIM_ICInitStructure.TIM_ICFilter=0x0f;                             
000060  200f              MOVS     r0,#0xf
000062  f8ad0008          STRH     r0,[sp,#8]
;;;60       TIM_ICInit(TIM1,&TIM_ICInitStructure);
000066  4669              MOV      r1,sp
000068  48a2              LDR      r0,|L1.756|
00006a  f7fffffe          BL       TIM_ICInit
;;;61     	
;;;62     	TIM_EncoderInterfaceConfig(TIM1, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Rising);
00006e  2300              MOVS     r3,#0
000070  461a              MOV      r2,r3
000072  2103              MOVS     r1,#3
000074  489f              LDR      r0,|L1.756|
000076  f7fffffe          BL       TIM_EncoderInterfaceConfig
;;;63     
;;;64     
;;;65       TIM_Cmd(TIM1,ENABLE);	
00007a  2101              MOVS     r1,#1
00007c  489d              LDR      r0,|L1.756|
00007e  f7fffffe          BL       TIM_Cmd
;;;66     }
000082  bd1f              POP      {r0-r4,pc}
;;;67     /****************************************************************************
                          ENDP

                  timer3_ini PROC
;;;74     ****************************************************************************/ 
;;;75     void timer3_ini(void)
000084  b500              PUSH     {lr}
;;;76     {  
000086  b087              SUB      sp,sp,#0x1c
;;;77        GPIO_InitTypeDef GPIO_InitStructure;	   
;;;78     
;;;79        TIM_ICInitTypeDef TIM_ICInitStructure;  
;;;80     	 TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStructure;
;;;81       
;;;82     	 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
000088  2101              MOVS     r1,#1
00008a  2002              MOVS     r0,#2
00008c  f7fffffe          BL       RCC_APB1PeriphClockCmd
;;;83     	
;;;84     	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
000090  2048              MOVS     r0,#0x48
000092  f88d001b          STRB     r0,[sp,#0x1b]
;;;85     	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7;
000096  20c0              MOVS     r0,#0xc0
000098  f8ad0018          STRH     r0,[sp,#0x18]
;;;86     	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
00009c  2003              MOVS     r0,#3
00009e  f88d001a          STRB     r0,[sp,#0x1a]
;;;87     	GPIO_Init(GPIOA, &GPIO_InitStructure);
0000a2  a906              ADD      r1,sp,#0x18
0000a4  4891              LDR      r0,|L1.748|
0000a6  f7fffffe          BL       GPIO_Init
;;;88     		
;;;89     	//ΪӿһзƵⲿʱӣԲҪʱ
;;;90     	TIM_TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
0000aa  2000              MOVS     r0,#0
0000ac  f8ad0006          STRH     r0,[sp,#6]
;;;91     	TIM_TimeBaseInitStructure.TIM_CounterMode = TIM_CounterMode_Up;//ģʽЧɱӿڿ
0000b0  f8ad0002          STRH     r0,[sp,#2]
;;;92     	TIM_TimeBaseInitStructure.TIM_Period = 65536 - 1;		//ARR
0000b4  f64f70ff          MOV      r0,#0xffff
0000b8  f8ad0004          STRH     r0,[sp,#4]
;;;93     	TIM_TimeBaseInitStructure.TIM_Prescaler = 1 - 1;		//PSCƵʱֱ
0000bc  2000              MOVS     r0,#0
0000be  f8ad0000          STRH     r0,[sp,#0]
;;;94     	TIM_TimeBaseInitStructure.TIM_RepetitionCounter = 0;
0000c2  f88d0008          STRB     r0,[sp,#8]
;;;95     	TIM_TimeBaseInit(TIM3, &TIM_TimeBaseInitStructure);
0000c6  4669              MOV      r1,sp
0000c8  488b              LDR      r0,|L1.760|
0000ca  f7fffffe          BL       TIM_TimeBaseInit
;;;96     	
;;;97     
;;;98     	TIM_ICStructInit(&TIM_ICInitStructure);
0000ce  a803              ADD      r0,sp,#0xc
0000d0  f7fffffe          BL       TIM_ICStructInit
;;;99     	TIM_ICInitStructure.TIM_Channel = TIM_Channel_1;//ͨ1
0000d4  2000              MOVS     r0,#0
0000d6  f8ad000c          STRH     r0,[sp,#0xc]
;;;100    	TIM_ICInitStructure.TIM_ICFilter = 0xF;         //˲
0000da  200f              MOVS     r0,#0xf
0000dc  f8ad0014          STRH     r0,[sp,#0x14]
;;;101    	TIM_ICInit(TIM3, &TIM_ICInitStructure);
0000e0  a903              ADD      r1,sp,#0xc
0000e2  4885              LDR      r0,|L1.760|
0000e4  f7fffffe          BL       TIM_ICInit
;;;102    	
;;;103    	TIM_ICInitStructure.TIM_Channel = TIM_Channel_2;//ͨ2
0000e8  2004              MOVS     r0,#4
0000ea  f8ad000c          STRH     r0,[sp,#0xc]
;;;104    	TIM_ICInitStructure.TIM_ICFilter = 0xF;         //˲
0000ee  200f              MOVS     r0,#0xf
0000f0  f8ad0014          STRH     r0,[sp,#0x14]
;;;105    	TIM_ICInit(TIM3, &TIM_ICInitStructure);
0000f4  a903              ADD      r1,sp,#0xc
0000f6  4880              LDR      r0,|L1.760|
0000f8  f7fffffe          BL       TIM_ICInit
;;;106    	
;;;107    	TIM_EncoderInterfaceConfig(TIM3, TIM_EncoderMode_TI12, TIM_ICPolarity_Rising, TIM_ICPolarity_Rising);//ñӿڣڶΪģʽΪͨļԣFallingʾͨRisingʾͨ
0000fc  2300              MOVS     r3,#0
0000fe  461a              MOV      r2,r3
000100  2103              MOVS     r1,#3
000102  487d              LDR      r0,|L1.760|
000104  f7fffffe          BL       TIM_EncoderInterfaceConfig
;;;108    	
;;;109    	TIM_Cmd(TIM3, ENABLE);
000108  2101              MOVS     r1,#1
00010a  487b              LDR      r0,|L1.760|
00010c  f7fffffe          BL       TIM_Cmd
;;;110    
;;;111    }
000110  b007              ADD      sp,sp,#0x1c
000112  bd00              POP      {pc}
;;;112    
                          ENDP

                  timer4_ini PROC
;;;121    ****************************************************************************/ 
;;;122    void timer4_ini(void)
000114  b508              PUSH     {r3,lr}
;;;123    {
;;;124       GPIO_InitTypeDef GPIO_InitStructure;	   
;;;125    
;;;126       RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
000116  2101              MOVS     r1,#1
000118  2004              MOVS     r0,#4
00011a  f7fffffe          BL       RCC_APB1PeriphClockCmd
;;;127       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 |GPIO_Pin_7 |GPIO_Pin_8 |GPIO_Pin_9  ;						//MT1 PWM   MT2 PWM
00011e  f44f7070          MOV      r0,#0x3c0
000122  f8ad0000          STRH     r0,[sp,#0]
;;;128       GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
000126  2018              MOVS     r0,#0x18
000128  f88d0003          STRB     r0,[sp,#3]
;;;129       GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
00012c  2003              MOVS     r0,#3
00012e  f88d0002          STRB     r0,[sp,#2]
;;;130       GPIO_Init(GPIOB, &GPIO_InitStructure);
000132  4669              MOV      r1,sp
000134  4871              LDR      r0,|L1.764|
000136  f7fffffe          BL       GPIO_Init
;;;131    	
;;;132       /*-------------------------------------------------------------------
;;;133      TIM2CLK=72MHz  ԤƵϵPrescaler=1 Ƶ ʱʱΪ72MHz
;;;134      ݹʽ ͨռձ=TIM2_CCR2/(TIM_Period+1),ԵõTIM_Pulseļֵ	 
;;;135      /ȽϼĴ2 TIM2_CCR2= CCR2_Val 	     
;;;136      --------------------------------------------------------10K -----------*/
;;;137      TIM4_TimeBaseStructure.TIM_Prescaler =0;			           //ԤƵTIM4_PSC=1 
00013a  2000              MOVS     r0,#0
00013c  4970              LDR      r1,|L1.768|
00013e  8008              STRH     r0,[r1,#0]
;;;138      TIM4_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;	//ϼģʽ TIM4_CR1[4]=0
000140  8048              STRH     r0,[r1,#2]
;;;139      TIM4_TimeBaseStructure.TIM_Period =7199;   	            //ԶװؼĴTIM4_APR  ȷƵΪ10KHz 		     
000142  f641401f          MOV      r0,#0x1c1f
000146  8088              STRH     r0,[r1,#4]
;;;140      TIM4_TimeBaseStructure.TIM_ClockDivision = 0x0;					//ʱӷƵ TIM4_CR1[9:8]=00
000148  2000              MOVS     r0,#0
00014a  80c8              STRH     r0,[r1,#6]
;;;141      TIM4_TimeBaseStructure.TIM_RepetitionCounter = 0x0;
00014c  7208              STRB     r0,[r1,#8]
;;;142    
;;;143      TIM_TimeBaseInit(TIM4,&TIM4_TimeBaseStructure);					//дTIM4Ĵ
00014e  486d              LDR      r0,|L1.772|
000150  f7fffffe          BL       TIM_TimeBaseInit
;;;144      
;;;145      TIM4_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2; 			    //PWMģʽ2 TIM4_CCMR1[14:12]=111 ϼʱ
000154  2070              MOVS     r0,#0x70
000156  496c              LDR      r1,|L1.776|
000158  8008              STRH     r0,[r1,#0]
;;;146      																                               //һTIMx_CNT<TIMx_CCR1ʱͨ1ΪЧƽΪЧƽ
;;;147      TIM4_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;    ///2  OC2źӦPB5
00015a  2001              MOVS     r0,#1
00015c  8048              STRH     r0,[r1,#2]
;;;148      TIM4_OCInitStructure.TIM_Pulse = 0; 					            //ȷռձȣֵЧƽʱ䡣
00015e  2000              MOVS     r0,#0
000160  80c8              STRH     r0,[r1,#6]
;;;149      //TIM4_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low; 	    //  ͵ƽЧ TIM4_CCER[5]=1;
;;;150    	TIM4_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; 	    //  ͵ƽЧ TIM4_CCER[5]=1;
000162  8108              STRH     r0,[r1,#8]
;;;151             
;;;152      TIM4_OCInitStructure.TIM_Pulse = 0; 					                 //ȷռձȣֵЧƽʱ䡣
000164  80c8              STRH     r0,[r1,#6]
;;;153    	TIM_OC1Init(TIM4, &TIM4_OCInitStructure);
000166  4867              LDR      r0,|L1.772|
000168  f7fffffe          BL       TIM_OC1Init
;;;154      TIM_OC1PreloadConfig(TIM4, TIM_OCPreload_Enable);
00016c  2108              MOVS     r1,#8
00016e  4865              LDR      r0,|L1.772|
000170  f7fffffe          BL       TIM_OC1PreloadConfig
;;;155      
;;;156    	TIM4_OCInitStructure.TIM_Pulse = 0; 
000174  2000              MOVS     r0,#0
000176  4964              LDR      r1,|L1.776|
000178  80c8              STRH     r0,[r1,#6]
;;;157      TIM_OC2Init(TIM4, &TIM4_OCInitStructure);
00017a  4862              LDR      r0,|L1.772|
00017c  f7fffffe          BL       TIM_OC2Init
;;;158      TIM_OC2PreloadConfig(TIM4, TIM_OCPreload_Enable);
000180  2108              MOVS     r1,#8
000182  4860              LDR      r0,|L1.772|
000184  f7fffffe          BL       TIM_OC2PreloadConfig
;;;159    	
;;;160    	
;;;161    	TIM4_OCInitStructure.TIM_Pulse = 0; 
000188  2000              MOVS     r0,#0
00018a  495f              LDR      r1,|L1.776|
00018c  80c8              STRH     r0,[r1,#6]
;;;162    	TIM_OC3Init(TIM4, &TIM4_OCInitStructure);
00018e  485d              LDR      r0,|L1.772|
000190  f7fffffe          BL       TIM_OC3Init
;;;163      TIM_OC3PreloadConfig(TIM4, TIM_OCPreload_Enable);
000194  2108              MOVS     r1,#8
000196  485b              LDR      r0,|L1.772|
000198  f7fffffe          BL       TIM_OC3PreloadConfig
;;;164    
;;;165      TIM4_OCInitStructure.TIM_Pulse = 0; 
00019c  2000              MOVS     r0,#0
00019e  495a              LDR      r1,|L1.776|
0001a0  80c8              STRH     r0,[r1,#6]
;;;166      TIM_OC4Init(TIM4, &TIM4_OCInitStructure);
0001a2  4858              LDR      r0,|L1.772|
0001a4  f7fffffe          BL       TIM_OC4Init
;;;167      TIM_OC4PreloadConfig(TIM4, TIM_OCPreload_Enable);
0001a8  2108              MOVS     r1,#8
0001aa  4856              LDR      r0,|L1.772|
0001ac  f7fffffe          BL       TIM_OC4PreloadConfig
;;;168      
;;;169    	
;;;170    	TIM_ClearFlag(TIM4, TIM_FLAG_Update);
0001b0  2101              MOVS     r1,#1
0001b2  4854              LDR      r0,|L1.772|
0001b4  f7fffffe          BL       TIM_ClearFlag
;;;171       //ֹARRԤװػ
;;;172       //TIM_ARRPreloadConfig(TIM3, DISABLE);
;;;173       //TIM3ж
;;;174      //TIM_ITConfig(TIM4,TIM_IT_Update,ENABLE);
;;;175    	 
;;;176      TIM_Cmd(TIM4,ENABLE);	
0001b8  2101              MOVS     r1,#1
0001ba  4852              LDR      r0,|L1.772|
0001bc  f7fffffe          BL       TIM_Cmd
;;;177    }
0001c0  bd08              POP      {r3,pc}
;;;178    
                          ENDP

                  brake PROC
;;;181    //---------------ɲ------------------------
;;;182    void brake(){	
0001c2  b510              PUSH     {r4,lr}
;;;183    	TIM_SetCompare1(TIM4,0);
0001c4  2100              MOVS     r1,#0
0001c6  484f              LDR      r0,|L1.772|
0001c8  f7fffffe          BL       TIM_SetCompare1
;;;184    	TIM_SetCompare2(TIM4,0);
0001cc  2100              MOVS     r1,#0
0001ce  484d              LDR      r0,|L1.772|
0001d0  f7fffffe          BL       TIM_SetCompare2
;;;185    	
;;;186    	TIM_SetCompare3(TIM4,0);
0001d4  2100              MOVS     r1,#0
0001d6  484b              LDR      r0,|L1.772|
0001d8  f7fffffe          BL       TIM_SetCompare3
;;;187    	TIM_SetCompare4(TIM4,0);
0001dc  2100              MOVS     r1,#0
0001de  4849              LDR      r0,|L1.772|
0001e0  f7fffffe          BL       TIM_SetCompare4
;;;188    	
;;;189    }
0001e4  bd10              POP      {r4,pc}
;;;190    
                          ENDP

                  Move_go PROC
;;;191    //---------------ǰ------------------------
;;;192    void Move_go(unsigned int val){  
0001e6  b510              PUSH     {r4,lr}
0001e8  4604              MOV      r4,r0
;;;193    	if(Start_PID==0 ||P.PID_is_Enable==0){
0001ea  4848              LDR      r0,|L1.780|
0001ec  7800              LDRB     r0,[r0,#0]  ; Start_PID
0001ee  b110              CBZ      r0,|L1.502|
0001f0  4847              LDR      r0,|L1.784|
0001f2  7c00              LDRB     r0,[r0,#0x10]  ; P
0001f4  b980              CBNZ     r0,|L1.536|
                  |L1.502|
;;;194    		TIM_SetCompare1(TIM4,0);
0001f6  2100              MOVS     r1,#0
0001f8  4842              LDR      r0,|L1.772|
0001fa  f7fffffe          BL       TIM_SetCompare1
;;;195    		TIM_SetCompare2(TIM4,val);
0001fe  b2a1              UXTH     r1,r4
000200  4840              LDR      r0,|L1.772|
000202  f7fffffe          BL       TIM_SetCompare2
;;;196    	
;;;197    		TIM_SetCompare3(TIM4,val);
000206  b2a1              UXTH     r1,r4
000208  483e              LDR      r0,|L1.772|
00020a  f7fffffe          BL       TIM_SetCompare3
;;;198    		TIM_SetCompare4(TIM4,0);
00020e  2100              MOVS     r1,#0
000210  483c              LDR      r0,|L1.772|
000212  f7fffffe          BL       TIM_SetCompare4
000216  e02e              B        |L1.630|
                  |L1.536|
;;;199      }
;;;200    	else{
;;;201    		if(wheel_ptr==1){
000218  483e              LDR      r0,|L1.788|
00021a  7800              LDRB     r0,[r0,#0]  ; wheel_ptr
00021c  2801              CMP      r0,#1
00021e  d113              BNE      |L1.584|
;;;202    			TIM_SetCompare1(TIM4,0);
000220  2100              MOVS     r1,#0
000222  4838              LDR      r0,|L1.772|
000224  f7fffffe          BL       TIM_SetCompare1
;;;203    		  TIM_SetCompare2(TIM4,val);
000228  b2a1              UXTH     r1,r4
00022a  4836              LDR      r0,|L1.772|
00022c  f7fffffe          BL       TIM_SetCompare2
;;;204    			
;;;205    			TIM_SetCompare3(TIM4,val+P.Un);
000230  4837              LDR      r0,|L1.784|
000232  8a80              LDRH     r0,[r0,#0x14]  ; P
000234  4420              ADD      r0,r0,r4
000236  b281              UXTH     r1,r0
000238  4832              LDR      r0,|L1.772|
00023a  f7fffffe          BL       TIM_SetCompare3
;;;206    			TIM_SetCompare4(TIM4,0);
00023e  2100              MOVS     r1,#0
000240  4830              LDR      r0,|L1.772|
000242  f7fffffe          BL       TIM_SetCompare4
000246  e016              B        |L1.630|
                  |L1.584|
;;;207    		}
;;;208    		else if(wheel_ptr==2){
000248  4832              LDR      r0,|L1.788|
00024a  7800              LDRB     r0,[r0,#0]  ; wheel_ptr
00024c  2802              CMP      r0,#2
00024e  d112              BNE      |L1.630|
;;;209    			TIM_SetCompare1(TIM4,0);
000250  2100              MOVS     r1,#0
000252  482c              LDR      r0,|L1.772|
000254  f7fffffe          BL       TIM_SetCompare1
;;;210    		  TIM_SetCompare2(TIM4,val+P.Un);
000258  482d              LDR      r0,|L1.784|
00025a  8a80              LDRH     r0,[r0,#0x14]  ; P
00025c  4420              ADD      r0,r0,r4
00025e  b281              UXTH     r1,r0
000260  4828              LDR      r0,|L1.772|
000262  f7fffffe          BL       TIM_SetCompare2
;;;211    			
;;;212    			TIM_SetCompare3(TIM4,val);
000266  b2a1              UXTH     r1,r4
000268  4826              LDR      r0,|L1.772|
00026a  f7fffffe          BL       TIM_SetCompare3
;;;213    			TIM_SetCompare4(TIM4,0);
00026e  2100              MOVS     r1,#0
000270  4824              LDR      r0,|L1.772|
000272  f7fffffe          BL       TIM_SetCompare4
                  |L1.630|
;;;214    		}
;;;215    	}
;;;216    	
;;;217    }
000276  bd10              POP      {r4,pc}
;;;218    
                          ENDP

                  Move_back PROC
;;;219    //---------------------------------------
;;;220    void Move_back(unsigned int val){
000278  b510              PUSH     {r4,lr}
00027a  4604              MOV      r4,r0
;;;221    
;;;222    	TIM_SetCompare2(TIM4,0);
00027c  2100              MOVS     r1,#0
00027e  4821              LDR      r0,|L1.772|
000280  f7fffffe          BL       TIM_SetCompare2
;;;223    	TIM_SetCompare1(TIM4,val);
000284  b2a1              UXTH     r1,r4
000286  481f              LDR      r0,|L1.772|
000288  f7fffffe          BL       TIM_SetCompare1
;;;224    	
;;;225    	TIM_SetCompare4(TIM4,val);
00028c  b2a1              UXTH     r1,r4
00028e  481d              LDR      r0,|L1.772|
000290  f7fffffe          BL       TIM_SetCompare4
;;;226    	TIM_SetCompare3(TIM4,0);
000294  2100              MOVS     r1,#0
000296  481b              LDR      r0,|L1.772|
000298  f7fffffe          BL       TIM_SetCompare3
;;;227    
;;;228    	
;;;229    }
00029c  bd10              POP      {r4,pc}
;;;230    
                          ENDP

                  Move_right PROC
;;;231    //---------------ת------------------------
;;;232    void Move_right(unsigned int val){
00029e  b510              PUSH     {r4,lr}
0002a0  4604              MOV      r4,r0
;;;233    	
;;;234    	TIM_SetCompare1(TIM4,0);
0002a2  2100              MOVS     r1,#0
0002a4  4817              LDR      r0,|L1.772|
0002a6  f7fffffe          BL       TIM_SetCompare1
;;;235    	TIM_SetCompare2(TIM4,val);
0002aa  b2a1              UXTH     r1,r4
0002ac  4815              LDR      r0,|L1.772|
0002ae  f7fffffe          BL       TIM_SetCompare2
;;;236    	
;;;237    	TIM_SetCompare4(TIM4,val);
0002b2  b2a1              UXTH     r1,r4
0002b4  4813              LDR      r0,|L1.772|
0002b6  f7fffffe          BL       TIM_SetCompare4
;;;238    	TIM_SetCompare3(TIM4,0);
0002ba  2100              MOVS     r1,#0
0002bc  4811              LDR      r0,|L1.772|
0002be  f7fffffe          BL       TIM_SetCompare3
;;;239    }
0002c2  bd10              POP      {r4,pc}
;;;240    
                          ENDP

                  Move_left PROC
;;;241    //---------------ת------------------------
;;;242    void Move_left(unsigned int val){
0002c4  b510              PUSH     {r4,lr}
0002c6  4604              MOV      r4,r0
;;;243    
;;;244    	
;;;245    	TIM_SetCompare2(TIM4,0);
0002c8  2100              MOVS     r1,#0
0002ca  480e              LDR      r0,|L1.772|
0002cc  f7fffffe          BL       TIM_SetCompare2
;;;246    	TIM_SetCompare1(TIM4,val);
0002d0  b2a1              UXTH     r1,r4
0002d2  480c              LDR      r0,|L1.772|
0002d4  f7fffffe          BL       TIM_SetCompare1
;;;247    	
;;;248    	TIM_SetCompare3(TIM4,val);
0002d8  b2a1              UXTH     r1,r4
0002da  480a              LDR      r0,|L1.772|
0002dc  f7fffffe          BL       TIM_SetCompare3
;;;249    	TIM_SetCompare4(TIM4,0);
0002e0  2100              MOVS     r1,#0
0002e2  4808              LDR      r0,|L1.772|
0002e4  f7fffffe          BL       TIM_SetCompare4
;;;250    
;;;251    }
0002e8  bd10              POP      {r4,pc}
                          ENDP

0002ea  0000              DCW      0x0000
                  |L1.748|
                          DCD      0x40010800
                  |L1.752|
                          DCD      TIM1_TimeBaseStructure
                  |L1.756|
                          DCD      0x40012c00
                  |L1.760|
                          DCD      0x40000400
                  |L1.764|
                          DCD      0x40010c00
                  |L1.768|
                          DCD      TIM4_TimeBaseStructure
                  |L1.772|
                          DCD      0x40000800
                  |L1.776|
                          DCD      TIM4_OCInitStructure
                  |L1.780|
                          DCD      Start_PID
                  |L1.784|
                          DCD      P
                  |L1.788|
                          DCD      wheel_ptr

                          AREA ||.bss||, DATA, NOINIT, ALIGN=1

                  TIM_TimeBaseStructure
                          %        10
                  TIM3_TimeBaseStructure
                          %        10
                  TIM1_TimeBaseStructure
                          %        10
                  TIM3_BDTRInitStructure
                          %        14
                  TIM4_TimeBaseStructure
                          %        10
                  TIM4_BDTRInitStructure
                          %        14
                  TIM3_OCInitStructure
                          %        16
                  TIM4_OCInitStructure
                          %        16
