; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637]
; commandline ArmCC [--list --debug -c --asm --interleave -o.\obj\stm32f10x_spi.o --asm_dir=.\list\ --list_dir=.\list\ --depend=.\obj\stm32f10x_spi.d --cpu=Cortex-M3 --apcs=interwork -O0 --diag_suppress=9931 -I.\FWlib\inc -I.\user -I.\CM3 -I.\dmp -I.\RTE\_STM32-FD -If:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -If:\Users\Administrator\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include -D__MICROLIB -D__UVISION_VERSION=530 -D_RTE_ -DSTM32F10X_MD -D_RTE_ -DUSE_STDPERIPH_DRIVER -DSTM32F10X_MD --omf_browse=.\obj\stm32f10x_spi.crf FWlib\SRC\stm32f10x_spi.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  SPI_I2S_DeInit PROC
;;;118      */
;;;119    void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
000000  b510              PUSH     {r4,lr}
;;;120    {
000002  4604              MOV      r4,r0
;;;121      /* Check the parameters */
;;;122      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;123    
;;;124      if (SPIx == SPI1)
000004  48be              LDR      r0,|L1.768|
000006  4284              CMP      r4,r0
000008  d108              BNE      |L1.28|
;;;125      {
;;;126        /* Enable SPI1 reset state */
;;;127        RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
00000a  2101              MOVS     r1,#1
00000c  1480              ASRS     r0,r0,#18
00000e  f7fffffe          BL       RCC_APB2PeriphResetCmd
;;;128        /* Release SPI1 from reset state */
;;;129        RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
000012  2100              MOVS     r1,#0
000014  14a0              ASRS     r0,r4,#18
000016  f7fffffe          BL       RCC_APB2PeriphResetCmd
00001a  e016              B        |L1.74|
                  |L1.28|
;;;130      }
;;;131      else if (SPIx == SPI2)
00001c  48b9              LDR      r0,|L1.772|
00001e  4284              CMP      r4,r0
000020  d108              BNE      |L1.52|
;;;132      {
;;;133        /* Enable SPI2 reset state */
;;;134        RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
000022  2101              MOVS     r1,#1
000024  1400              ASRS     r0,r0,#16
000026  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;135        /* Release SPI2 from reset state */
;;;136        RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
00002a  2100              MOVS     r1,#0
00002c  1420              ASRS     r0,r4,#16
00002e  f7fffffe          BL       RCC_APB1PeriphResetCmd
000032  e00a              B        |L1.74|
                  |L1.52|
;;;137      }
;;;138      else
;;;139      {
;;;140        if (SPIx == SPI3)
000034  48b4              LDR      r0,|L1.776|
000036  4284              CMP      r4,r0
000038  d107              BNE      |L1.74|
;;;141        {
;;;142          /* Enable SPI3 reset state */
;;;143          RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
00003a  2101              MOVS     r1,#1
00003c  13c0              ASRS     r0,r0,#15
00003e  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;144          /* Release SPI3 from reset state */
;;;145          RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
000042  2100              MOVS     r1,#0
000044  13e0              ASRS     r0,r4,#15
000046  f7fffffe          BL       RCC_APB1PeriphResetCmd
                  |L1.74|
;;;146        }
;;;147      }
;;;148    }
00004a  bd10              POP      {r4,pc}
;;;149    
                          ENDP

                  SPI_Init PROC
;;;157      */
;;;158    void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
00004c  b510              PUSH     {r4,lr}
;;;159    {
;;;160      uint16_t tmpreg = 0;
00004e  2200              MOVS     r2,#0
;;;161      
;;;162      /* check the parameters */
;;;163      assert_param(IS_SPI_ALL_PERIPH(SPIx));   
;;;164      
;;;165      /* Check the SPI parameters */
;;;166      assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
;;;167      assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
;;;168      assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
;;;169      assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
;;;170      assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
;;;171      assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
;;;172      assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
;;;173      assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
;;;174      assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
;;;175    
;;;176    /*---------------------------- SPIx CR1 Configuration ------------------------*/
;;;177      /* Get the SPIx CR1 value */
;;;178      tmpreg = SPIx->CR1;
000050  8802              LDRH     r2,[r0,#0]
;;;179      /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
;;;180      tmpreg &= CR1_CLEAR_Mask;
000052  f4025241          AND      r2,r2,#0x3040
;;;181      /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
;;;182         master/salve mode, CPOL and CPHA */
;;;183      /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
;;;184      /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
;;;185      /* Set LSBFirst bit according to SPI_FirstBit value */
;;;186      /* Set BR bits according to SPI_BaudRatePrescaler value */
;;;187      /* Set CPOL bit according to SPI_CPOL value */
;;;188      /* Set CPHA bit according to SPI_CPHA value */
;;;189      tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
000056  880b              LDRH     r3,[r1,#0]
000058  884c              LDRH     r4,[r1,#2]
00005a  4323              ORRS     r3,r3,r4
00005c  888c              LDRH     r4,[r1,#4]
00005e  4323              ORRS     r3,r3,r4
000060  88cc              LDRH     r4,[r1,#6]
000062  4323              ORRS     r3,r3,r4
000064  890c              LDRH     r4,[r1,#8]
000066  4323              ORRS     r3,r3,r4
000068  894c              LDRH     r4,[r1,#0xa]
00006a  4323              ORRS     r3,r3,r4
00006c  898c              LDRH     r4,[r1,#0xc]
00006e  4323              ORRS     r3,r3,r4
000070  89cc              LDRH     r4,[r1,#0xe]
000072  4323              ORRS     r3,r3,r4
000074  431a              ORRS     r2,r2,r3
;;;190                      SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |  
;;;191                      SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |  
;;;192                      SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
;;;193      /* Write to SPIx CR1 */
;;;194      SPIx->CR1 = tmpreg;
000076  8002              STRH     r2,[r0,#0]
;;;195      
;;;196      /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
;;;197      SPIx->I2SCFGR &= SPI_Mode_Select;		
000078  8b83              LDRH     r3,[r0,#0x1c]
00007a  f24f74ff          MOV      r4,#0xf7ff
00007e  4023              ANDS     r3,r3,r4
000080  8383              STRH     r3,[r0,#0x1c]
;;;198    
;;;199    /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
;;;200      /* Write to SPIx CRCPOLY */
;;;201      SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
000082  8a0b              LDRH     r3,[r1,#0x10]
000084  8203              STRH     r3,[r0,#0x10]
;;;202    }
000086  bd10              POP      {r4,pc}
;;;203    
                          ENDP

                  I2S_Init PROC
;;;218      */
;;;219    void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
000088  e92d4ff0          PUSH     {r4-r11,lr}
;;;220    {
00008c  b085              SUB      sp,sp,#0x14
00008e  4605              MOV      r5,r0
000090  460c              MOV      r4,r1
;;;221      uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
000092  f04f0900          MOV      r9,#0
000096  2702              MOVS     r7,#2
000098  f04f0800          MOV      r8,#0
00009c  f04f0b01          MOV      r11,#1
;;;222      uint32_t tmp = 0;
0000a0  2600              MOVS     r6,#0
;;;223      RCC_ClocksTypeDef RCC_Clocks;
;;;224      uint32_t sourceclock = 0;
0000a2  46b2              MOV      r10,r6
;;;225      
;;;226      /* Check the I2S parameters */
;;;227      assert_param(IS_SPI_23_PERIPH(SPIx));
;;;228      assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
;;;229      assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
;;;230      assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
;;;231      assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
;;;232      assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
;;;233      assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));  
;;;234    
;;;235    /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
;;;236      /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
;;;237      SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask; 
0000a4  8ba8              LDRH     r0,[r5,#0x1c]
0000a6  f24f0140          MOV      r1,#0xf040
0000aa  4008              ANDS     r0,r0,r1
0000ac  83a8              STRH     r0,[r5,#0x1c]
;;;238      SPIx->I2SPR = 0x0002;
0000ae  2002              MOVS     r0,#2
0000b0  8428              STRH     r0,[r5,#0x20]
;;;239      
;;;240      /* Get the I2SCFGR register value */
;;;241      tmpreg = SPIx->I2SCFGR;
0000b2  f8b5901c          LDRH     r9,[r5,#0x1c]
;;;242      
;;;243      /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
;;;244      if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
0000b6  68a0              LDR      r0,[r4,#8]
0000b8  2802              CMP      r0,#2
0000ba  d101              BNE      |L1.192|
;;;245      {
;;;246        i2sodd = (uint16_t)0;
0000bc  bf00              NOP      
;;;247        i2sdiv = (uint16_t)2;   
0000be  e038              B        |L1.306|
                  |L1.192|
;;;248      }
;;;249      /* If the requested audio frequency is not the default, compute the prescaler */
;;;250      else
;;;251      {
;;;252        /* Check the frame length (For the Prescaler computing) */
;;;253        if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
0000c0  88a0              LDRH     r0,[r4,#4]
0000c2  b910              CBNZ     r0,|L1.202|
;;;254        {
;;;255          /* Packet length is 16 bits */
;;;256          packetlength = 1;
0000c4  f04f0b01          MOV      r11,#1
0000c8  e001              B        |L1.206|
                  |L1.202|
;;;257        }
;;;258        else
;;;259        {
;;;260          /* Packet length is 32 bits */
;;;261          packetlength = 2;
0000ca  f04f0b02          MOV      r11,#2
                  |L1.206|
;;;262        }
;;;263    
;;;264        /* Get the I2S clock source mask depending on the peripheral number */
;;;265        if(((uint32_t)SPIx) == SPI2_BASE)
0000ce  488d              LDR      r0,|L1.772|
0000d0  4285              CMP      r5,r0
0000d2  d100              BNE      |L1.214|
;;;266        {
;;;267          /* The mask is relative to I2S2 */
;;;268          tmp = I2S2_CLOCK_SRC;
0000d4  e000              B        |L1.216|
                  |L1.214|
;;;269        }
;;;270        else 
;;;271        {
;;;272          /* The mask is relative to I2S3 */      
;;;273          tmp = I2S3_CLOCK_SRC;
0000d6  bf00              NOP      
                  |L1.216|
;;;274        }
;;;275    
;;;276        /* Check the I2S clock source configuration depending on the Device:
;;;277           Only Connectivity line devices have the PLL3 VCO clock */
;;;278    #ifdef STM32F10X_CL
;;;279        if((RCC->CFGR2 & tmp) != 0)
;;;280        {
;;;281          /* Get the configuration bits of RCC PLL3 multiplier */
;;;282          tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12);
;;;283    
;;;284          /* Get the value of the PLL3 multiplier */      
;;;285          if((tmp > 5) && (tmp < 15))
;;;286          {
;;;287            /* Multiplier is between 8 and 14 (value 15 is forbidden) */
;;;288            tmp += 2;
;;;289          }
;;;290          else
;;;291          {
;;;292            if (tmp == 15)
;;;293            {
;;;294              /* Multiplier is 20 */
;;;295              tmp = 20;
;;;296            }
;;;297          }      
;;;298          /* Get the PREDIV2 value */
;;;299          sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1);
;;;300          
;;;301          /* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */
;;;302          sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2); 
;;;303        }
;;;304        else
;;;305        {
;;;306          /* I2S Clock source is System clock: Get System Clock frequency */
;;;307          RCC_GetClocksFreq(&RCC_Clocks);      
;;;308          
;;;309          /* Get the source clock value: based on System Clock value */
;;;310          sourceclock = RCC_Clocks.SYSCLK_Frequency;
;;;311        }        
;;;312    #else /* STM32F10X_HD */
;;;313        /* I2S Clock source is System clock: Get System Clock frequency */
;;;314        RCC_GetClocksFreq(&RCC_Clocks);      
0000d8  4668              MOV      r0,sp
0000da  f7fffffe          BL       RCC_GetClocksFreq
;;;315          
;;;316        /* Get the source clock value: based on System Clock value */
;;;317        sourceclock = RCC_Clocks.SYSCLK_Frequency;    
0000de  f8dda000          LDR      r10,[sp,#0]
;;;318    #endif /* STM32F10X_CL */    
;;;319    
;;;320        /* Compute the Real divider depending on the MCLK output state with a floating point */
;;;321        if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
0000e2  88e0              LDRH     r0,[r4,#6]
0000e4  f5b07f00          CMP      r0,#0x200
0000e8  d10a              BNE      |L1.256|
;;;322        {
;;;323          /* MCLK output is enabled */
;;;324          tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
0000ea  ea4f201a          LSR      r0,r10,#8
0000ee  eb000080          ADD      r0,r0,r0,LSL #2
0000f2  0040              LSLS     r0,r0,#1
0000f4  68a1              LDR      r1,[r4,#8]
0000f6  fbb0f0f1          UDIV     r0,r0,r1
0000fa  1d40              ADDS     r0,r0,#5
0000fc  b286              UXTH     r6,r0
0000fe  e00b              B        |L1.280|
                  |L1.256|
;;;325        }
;;;326        else
;;;327        {
;;;328          /* MCLK output is disabled */
;;;329          tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
000100  ea4f104b          LSL      r0,r11,#5
000104  fbbaf0f0          UDIV     r0,r10,r0
000108  eb000080          ADD      r0,r0,r0,LSL #2
00010c  0040              LSLS     r0,r0,#1
00010e  68a1              LDR      r1,[r4,#8]
000110  fbb0f0f1          UDIV     r0,r0,r1
000114  1d40              ADDS     r0,r0,#5
000116  b286              UXTH     r6,r0
                  |L1.280|
;;;330        }
;;;331        
;;;332        /* Remove the floating point */
;;;333        tmp = tmp / 10;  
000118  200a              MOVS     r0,#0xa
00011a  fbb6f6f0          UDIV     r6,r6,r0
;;;334          
;;;335        /* Check the parity of the divider */
;;;336        i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
00011e  f0060801          AND      r8,r6,#1
;;;337       
;;;338        /* Compute the i2sdiv prescaler */
;;;339        i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
000122  eba60008          SUB      r0,r6,r8
000126  f3c0074f          UBFX     r7,r0,#1,#16
;;;340       
;;;341        /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
;;;342        i2sodd = (uint16_t) (i2sodd << 8);
00012a  f64f70ff          MOV      r0,#0xffff
00012e  ea002808          AND      r8,r0,r8,LSL #8
                  |L1.306|
;;;343      }
;;;344      
;;;345      /* Test if the divider is 1 or 0 or greater than 0xFF */
;;;346      if ((i2sdiv < 2) || (i2sdiv > 0xFF))
000132  2f02              CMP      r7,#2
000134  db01              BLT      |L1.314|
000136  2fff              CMP      r7,#0xff
000138  dd02              BLE      |L1.320|
                  |L1.314|
;;;347      {
;;;348        /* Set the default values */
;;;349        i2sdiv = 2;
00013a  2702              MOVS     r7,#2
;;;350        i2sodd = 0;
00013c  f04f0800          MOV      r8,#0
                  |L1.320|
;;;351      }
;;;352    
;;;353      /* Write to SPIx I2SPR register the computed value */
;;;354      SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));  
000140  88e0              LDRH     r0,[r4,#6]
000142  ea400008          ORR      r0,r0,r8
000146  4338              ORRS     r0,r0,r7
000148  8428              STRH     r0,[r5,#0x20]
;;;355     
;;;356      /* Configure the I2S with the SPI_InitStruct values */
;;;357      tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \
00014a  88a0              LDRH     r0,[r4,#4]
00014c  89a1              LDRH     r1,[r4,#0xc]
00014e  4308              ORRS     r0,r0,r1
000150  8861              LDRH     r1,[r4,#2]
000152  4308              ORRS     r0,r0,r1
000154  8821              LDRH     r1,[r4,#0]
000156  4308              ORRS     r0,r0,r1
000158  f4406000          ORR      r0,r0,#0x800
00015c  ea400909          ORR      r9,r0,r9
;;;358                      (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
;;;359                      (uint16_t)I2S_InitStruct->I2S_CPOL))));
;;;360     
;;;361      /* Write to SPIx I2SCFGR */  
;;;362      SPIx->I2SCFGR = tmpreg;   
000160  f8a5901c          STRH     r9,[r5,#0x1c]
;;;363    }
000164  b005              ADD      sp,sp,#0x14
000166  e8bd8ff0          POP      {r4-r11,pc}
;;;364    
                          ENDP

                  SPI_StructInit PROC
;;;369      */
;;;370    void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
00016a  2100              MOVS     r1,#0
;;;371    {
;;;372    /*--------------- Reset SPI init structure parameters values -----------------*/
;;;373      /* Initialize the SPI_Direction member */
;;;374      SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
00016c  8001              STRH     r1,[r0,#0]
;;;375      /* initialize the SPI_Mode member */
;;;376      SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
00016e  8041              STRH     r1,[r0,#2]
;;;377      /* initialize the SPI_DataSize member */
;;;378      SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
000170  8081              STRH     r1,[r0,#4]
;;;379      /* Initialize the SPI_CPOL member */
;;;380      SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
000172  80c1              STRH     r1,[r0,#6]
;;;381      /* Initialize the SPI_CPHA member */
;;;382      SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
000174  8101              STRH     r1,[r0,#8]
;;;383      /* Initialize the SPI_NSS member */
;;;384      SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
000176  8141              STRH     r1,[r0,#0xa]
;;;385      /* Initialize the SPI_BaudRatePrescaler member */
;;;386      SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
000178  8181              STRH     r1,[r0,#0xc]
;;;387      /* Initialize the SPI_FirstBit member */
;;;388      SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
00017a  81c1              STRH     r1,[r0,#0xe]
;;;389      /* Initialize the SPI_CRCPolynomial member */
;;;390      SPI_InitStruct->SPI_CRCPolynomial = 7;
00017c  2107              MOVS     r1,#7
00017e  8201              STRH     r1,[r0,#0x10]
;;;391    }
000180  4770              BX       lr
;;;392    
                          ENDP

                  I2S_StructInit PROC
;;;397      */
;;;398    void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
000182  2100              MOVS     r1,#0
;;;399    {
;;;400    /*--------------- Reset I2S init structure parameters values -----------------*/
;;;401      /* Initialize the I2S_Mode member */
;;;402      I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
000184  8001              STRH     r1,[r0,#0]
;;;403      
;;;404      /* Initialize the I2S_Standard member */
;;;405      I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
000186  8041              STRH     r1,[r0,#2]
;;;406      
;;;407      /* Initialize the I2S_DataFormat member */
;;;408      I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
000188  8081              STRH     r1,[r0,#4]
;;;409      
;;;410      /* Initialize the I2S_MCLKOutput member */
;;;411      I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
00018a  80c1              STRH     r1,[r0,#6]
;;;412      
;;;413      /* Initialize the I2S_AudioFreq member */
;;;414      I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
00018c  2102              MOVS     r1,#2
00018e  6081              STR      r1,[r0,#8]
;;;415      
;;;416      /* Initialize the I2S_CPOL member */
;;;417      I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
000190  2100              MOVS     r1,#0
000192  8181              STRH     r1,[r0,#0xc]
;;;418    }
000194  4770              BX       lr
;;;419    
                          ENDP

                  SPI_Cmd PROC
;;;426      */
;;;427    void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
000196  b121              CBZ      r1,|L1.418|
;;;428    {
;;;429      /* Check the parameters */
;;;430      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;431      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;432      if (NewState != DISABLE)
;;;433      {
;;;434        /* Enable the selected SPI peripheral */
;;;435        SPIx->CR1 |= CR1_SPE_Set;
000198  8802              LDRH     r2,[r0,#0]
00019a  f0420240          ORR      r2,r2,#0x40
00019e  8002              STRH     r2,[r0,#0]
0001a0  e004              B        |L1.428|
                  |L1.418|
;;;436      }
;;;437      else
;;;438      {
;;;439        /* Disable the selected SPI peripheral */
;;;440        SPIx->CR1 &= CR1_SPE_Reset;
0001a2  8802              LDRH     r2,[r0,#0]
0001a4  f64f73bf          MOV      r3,#0xffbf
0001a8  401a              ANDS     r2,r2,r3
0001aa  8002              STRH     r2,[r0,#0]
                  |L1.428|
;;;441      }
;;;442    }
0001ac  4770              BX       lr
;;;443    
                          ENDP

                  I2S_Cmd PROC
;;;450      */
;;;451    void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
0001ae  b121              CBZ      r1,|L1.442|
;;;452    {
;;;453      /* Check the parameters */
;;;454      assert_param(IS_SPI_23_PERIPH(SPIx));
;;;455      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;456      if (NewState != DISABLE)
;;;457      {
;;;458        /* Enable the selected SPI peripheral (in I2S mode) */
;;;459        SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
0001b0  8b82              LDRH     r2,[r0,#0x1c]
0001b2  f4426280          ORR      r2,r2,#0x400
0001b6  8382              STRH     r2,[r0,#0x1c]
0001b8  e004              B        |L1.452|
                  |L1.442|
;;;460      }
;;;461      else
;;;462      {
;;;463        /* Disable the selected SPI peripheral (in I2S mode) */
;;;464        SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
0001ba  8b82              LDRH     r2,[r0,#0x1c]
0001bc  f64f33ff          MOV      r3,#0xfbff
0001c0  401a              ANDS     r2,r2,r3
0001c2  8382              STRH     r2,[r0,#0x1c]
                  |L1.452|
;;;465      }
;;;466    }
0001c4  4770              BX       lr
;;;467    
                          ENDP

                  SPI_I2S_ITConfig PROC
;;;481      */
;;;482    void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
0001c6  b530              PUSH     {r4,r5,lr}
;;;483    {
;;;484      uint16_t itpos = 0, itmask = 0 ;
0001c8  2400              MOVS     r4,#0
0001ca  2300              MOVS     r3,#0
;;;485      /* Check the parameters */
;;;486      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;487      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;488      assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
;;;489    
;;;490      /* Get the SPI/I2S IT index */
;;;491      itpos = SPI_I2S_IT >> 4;
0001cc  110c              ASRS     r4,r1,#4
;;;492    
;;;493      /* Set the IT mask */
;;;494      itmask = (uint16_t)1 << (uint16_t)itpos;
0001ce  2501              MOVS     r5,#1
0001d0  40a5              LSLS     r5,r5,r4
0001d2  b2ab              UXTH     r3,r5
;;;495    
;;;496      if (NewState != DISABLE)
0001d4  b11a              CBZ      r2,|L1.478|
;;;497      {
;;;498        /* Enable the selected SPI/I2S interrupt */
;;;499        SPIx->CR2 |= itmask;
0001d6  8885              LDRH     r5,[r0,#4]
0001d8  431d              ORRS     r5,r5,r3
0001da  8085              STRH     r5,[r0,#4]
0001dc  e002              B        |L1.484|
                  |L1.478|
;;;500      }
;;;501      else
;;;502      {
;;;503        /* Disable the selected SPI/I2S interrupt */
;;;504        SPIx->CR2 &= (uint16_t)~itmask;
0001de  8885              LDRH     r5,[r0,#4]
0001e0  439d              BICS     r5,r5,r3
0001e2  8085              STRH     r5,[r0,#4]
                  |L1.484|
;;;505      }
;;;506    }
0001e4  bd30              POP      {r4,r5,pc}
;;;507    
                          ENDP

                  SPI_I2S_DMACmd PROC
;;;520      */
;;;521    void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
0001e6  b11a              CBZ      r2,|L1.496|
;;;522    {
;;;523      /* Check the parameters */
;;;524      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;525      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;526      assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
;;;527      if (NewState != DISABLE)
;;;528      {
;;;529        /* Enable the selected SPI/I2S DMA requests */
;;;530        SPIx->CR2 |= SPI_I2S_DMAReq;
0001e8  8883              LDRH     r3,[r0,#4]
0001ea  430b              ORRS     r3,r3,r1
0001ec  8083              STRH     r3,[r0,#4]
0001ee  e002              B        |L1.502|
                  |L1.496|
;;;531      }
;;;532      else
;;;533      {
;;;534        /* Disable the selected SPI/I2S DMA requests */
;;;535        SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
0001f0  8883              LDRH     r3,[r0,#4]
0001f2  438b              BICS     r3,r3,r1
0001f4  8083              STRH     r3,[r0,#4]
                  |L1.502|
;;;536      }
;;;537    }
0001f6  4770              BX       lr
;;;538    
                          ENDP

                  SPI_I2S_SendData PROC
;;;546      */
;;;547    void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
0001f8  8181              STRH     r1,[r0,#0xc]
;;;548    {
;;;549      /* Check the parameters */
;;;550      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;551      
;;;552      /* Write in the DR register the data to be sent */
;;;553      SPIx->DR = Data;
;;;554    }
0001fa  4770              BX       lr
;;;555    
                          ENDP

                  SPI_I2S_ReceiveData PROC
;;;562      */
;;;563    uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
0001fc  4601              MOV      r1,r0
;;;564    {
;;;565      /* Check the parameters */
;;;566      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;567      
;;;568      /* Return the data in the DR register */
;;;569      return SPIx->DR;
0001fe  8988              LDRH     r0,[r1,#0xc]
;;;570    }
000200  4770              BX       lr
;;;571    
                          ENDP

                  SPI_NSSInternalSoftwareConfig PROC
;;;580      */
;;;581    void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
000202  f64f62ff          MOV      r2,#0xfeff
;;;582    {
;;;583      /* Check the parameters */
;;;584      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;585      assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
;;;586      if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
000206  4291              CMP      r1,r2
000208  d004              BEQ      |L1.532|
;;;587      {
;;;588        /* Set NSS pin internally by software */
;;;589        SPIx->CR1 |= SPI_NSSInternalSoft_Set;
00020a  8802              LDRH     r2,[r0,#0]
00020c  f4427280          ORR      r2,r2,#0x100
000210  8002              STRH     r2,[r0,#0]
000212  e004              B        |L1.542|
                  |L1.532|
;;;590      }
;;;591      else
;;;592      {
;;;593        /* Reset NSS pin internally by software */
;;;594        SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
000214  8802              LDRH     r2,[r0,#0]
000216  f64f63ff          MOV      r3,#0xfeff
00021a  401a              ANDS     r2,r2,r3
00021c  8002              STRH     r2,[r0,#0]
                  |L1.542|
;;;595      }
;;;596    }
00021e  4770              BX       lr
;;;597    
                          ENDP

                  SPI_SSOutputCmd PROC
;;;604      */
;;;605    void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
000220  b121              CBZ      r1,|L1.556|
;;;606    {
;;;607      /* Check the parameters */
;;;608      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;609      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;610      if (NewState != DISABLE)
;;;611      {
;;;612        /* Enable the selected SPI SS output */
;;;613        SPIx->CR2 |= CR2_SSOE_Set;
000222  8882              LDRH     r2,[r0,#4]
000224  f0420204          ORR      r2,r2,#4
000228  8082              STRH     r2,[r0,#4]
00022a  e004              B        |L1.566|
                  |L1.556|
;;;614      }
;;;615      else
;;;616      {
;;;617        /* Disable the selected SPI SS output */
;;;618        SPIx->CR2 &= CR2_SSOE_Reset;
00022c  8882              LDRH     r2,[r0,#4]
00022e  f64f73fb          MOV      r3,#0xfffb
000232  401a              ANDS     r2,r2,r3
000234  8082              STRH     r2,[r0,#4]
                  |L1.566|
;;;619      }
;;;620    }
000236  4770              BX       lr
;;;621    
                          ENDP

                  SPI_DataSizeConfig PROC
;;;630      */
;;;631    void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
000238  8802              LDRH     r2,[r0,#0]
;;;632    {
;;;633      /* Check the parameters */
;;;634      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;635      assert_param(IS_SPI_DATASIZE(SPI_DataSize));
;;;636      /* Clear DFF bit */
;;;637      SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
00023a  f24f73ff          MOV      r3,#0xf7ff
00023e  401a              ANDS     r2,r2,r3
000240  8002              STRH     r2,[r0,#0]
;;;638      /* Set new DFF bit value */
;;;639      SPIx->CR1 |= SPI_DataSize;
000242  8802              LDRH     r2,[r0,#0]
000244  430a              ORRS     r2,r2,r1
000246  8002              STRH     r2,[r0,#0]
;;;640    }
000248  4770              BX       lr
;;;641    
                          ENDP

                  SPI_TransmitCRC PROC
;;;646      */
;;;647    void SPI_TransmitCRC(SPI_TypeDef* SPIx)
00024a  8801              LDRH     r1,[r0,#0]
;;;648    {
;;;649      /* Check the parameters */
;;;650      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;651      
;;;652      /* Enable the selected SPI CRC transmission */
;;;653      SPIx->CR1 |= CR1_CRCNext_Set;
00024c  f4415180          ORR      r1,r1,#0x1000
000250  8001              STRH     r1,[r0,#0]
;;;654    }
000252  4770              BX       lr
;;;655    
                          ENDP

                  SPI_CalculateCRC PROC
;;;662      */
;;;663    void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
000254  b121              CBZ      r1,|L1.608|
;;;664    {
;;;665      /* Check the parameters */
;;;666      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;667      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;668      if (NewState != DISABLE)
;;;669      {
;;;670        /* Enable the selected SPI CRC calculation */
;;;671        SPIx->CR1 |= CR1_CRCEN_Set;
000256  8802              LDRH     r2,[r0,#0]
000258  f4425200          ORR      r2,r2,#0x2000
00025c  8002              STRH     r2,[r0,#0]
00025e  e004              B        |L1.618|
                  |L1.608|
;;;672      }
;;;673      else
;;;674      {
;;;675        /* Disable the selected SPI CRC calculation */
;;;676        SPIx->CR1 &= CR1_CRCEN_Reset;
000260  8802              LDRH     r2,[r0,#0]
000262  f64d73ff          MOV      r3,#0xdfff
000266  401a              ANDS     r2,r2,r3
000268  8002              STRH     r2,[r0,#0]
                  |L1.618|
;;;677      }
;;;678    }
00026a  4770              BX       lr
;;;679    
                          ENDP

                  SPI_GetCRC PROC
;;;688      */
;;;689    uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
00026c  4602              MOV      r2,r0
;;;690    {
;;;691      uint16_t crcreg = 0;
00026e  2000              MOVS     r0,#0
;;;692      /* Check the parameters */
;;;693      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;694      assert_param(IS_SPI_CRC(SPI_CRC));
;;;695      if (SPI_CRC != SPI_CRC_Rx)
000270  2901              CMP      r1,#1
000272  d001              BEQ      |L1.632|
;;;696      {
;;;697        /* Get the Tx CRC register */
;;;698        crcreg = SPIx->TXCRCR;
000274  8b10              LDRH     r0,[r2,#0x18]
000276  e000              B        |L1.634|
                  |L1.632|
;;;699      }
;;;700      else
;;;701      {
;;;702        /* Get the Rx CRC register */
;;;703        crcreg = SPIx->RXCRCR;
000278  8a90              LDRH     r0,[r2,#0x14]
                  |L1.634|
;;;704      }
;;;705      /* Return the selected CRC register */
;;;706      return crcreg;
;;;707    }
00027a  4770              BX       lr
;;;708    
                          ENDP

                  SPI_GetCRCPolynomial PROC
;;;713      */
;;;714    uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
00027c  4601              MOV      r1,r0
;;;715    {
;;;716      /* Check the parameters */
;;;717      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;718      
;;;719      /* Return the CRC polynomial register */
;;;720      return SPIx->CRCPR;
00027e  8a08              LDRH     r0,[r1,#0x10]
;;;721    }
000280  4770              BX       lr
;;;722    
                          ENDP

                  SPI_BiDirectionalLineConfig PROC
;;;731      */
;;;732    void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
000282  f5b14f80          CMP      r1,#0x4000
;;;733    {
;;;734      /* Check the parameters */
;;;735      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;736      assert_param(IS_SPI_DIRECTION(SPI_Direction));
;;;737      if (SPI_Direction == SPI_Direction_Tx)
000286  d104              BNE      |L1.658|
;;;738      {
;;;739        /* Set the Tx only mode */
;;;740        SPIx->CR1 |= SPI_Direction_Tx;
000288  8802              LDRH     r2,[r0,#0]
00028a  f4424280          ORR      r2,r2,#0x4000
00028e  8002              STRH     r2,[r0,#0]
000290  e004              B        |L1.668|
                  |L1.658|
;;;741      }
;;;742      else
;;;743      {
;;;744        /* Set the Rx only mode */
;;;745        SPIx->CR1 &= SPI_Direction_Rx;
000292  8802              LDRH     r2,[r0,#0]
000294  f64b73ff          MOV      r3,#0xbfff
000298  401a              ANDS     r2,r2,r3
00029a  8002              STRH     r2,[r0,#0]
                  |L1.668|
;;;746      }
;;;747    }
00029c  4770              BX       lr
;;;748    
                          ENDP

                  SPI_I2S_GetFlagStatus PROC
;;;765      */
;;;766    FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
00029e  4602              MOV      r2,r0
;;;767    {
;;;768      FlagStatus bitstatus = RESET;
0002a0  2000              MOVS     r0,#0
;;;769      /* Check the parameters */
;;;770      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;771      assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
;;;772      /* Check the status of the specified SPI/I2S flag */
;;;773      if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
0002a2  8913              LDRH     r3,[r2,#8]
0002a4  400b              ANDS     r3,r3,r1
0002a6  b10b              CBZ      r3,|L1.684|
;;;774      {
;;;775        /* SPI_I2S_FLAG is set */
;;;776        bitstatus = SET;
0002a8  2001              MOVS     r0,#1
0002aa  e000              B        |L1.686|
                  |L1.684|
;;;777      }
;;;778      else
;;;779      {
;;;780        /* SPI_I2S_FLAG is reset */
;;;781        bitstatus = RESET;
0002ac  2000              MOVS     r0,#0
                  |L1.686|
;;;782      }
;;;783      /* Return the SPI_I2S_FLAG status */
;;;784      return  bitstatus;
;;;785    }
0002ae  4770              BX       lr
;;;786    
                          ENDP

                  SPI_I2S_ClearFlag PROC
;;;803      */
;;;804    void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
0002b0  43ca              MVNS     r2,r1
;;;805    {
;;;806      /* Check the parameters */
;;;807      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;808      assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
;;;809        
;;;810        /* Clear the selected SPI CRC Error (CRCERR) flag */
;;;811        SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
0002b2  8102              STRH     r2,[r0,#8]
;;;812    }
0002b4  4770              BX       lr
;;;813    
                          ENDP

                  SPI_I2S_GetITStatus PROC
;;;828      */
;;;829    ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
0002b6  b5f0              PUSH     {r4-r7,lr}
;;;830    {
0002b8  4602              MOV      r2,r0
;;;831      ITStatus bitstatus = RESET;
0002ba  2000              MOVS     r0,#0
;;;832      uint16_t itpos = 0, itmask = 0, enablestatus = 0;
0002bc  2400              MOVS     r4,#0
0002be  2300              MOVS     r3,#0
0002c0  2500              MOVS     r5,#0
;;;833    
;;;834      /* Check the parameters */
;;;835      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;836      assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
;;;837    
;;;838      /* Get the SPI/I2S IT index */
;;;839      itpos = 0x01 << (SPI_I2S_IT & 0x0F);
0002c2  f001070f          AND      r7,r1,#0xf
0002c6  2601              MOVS     r6,#1
0002c8  40be              LSLS     r6,r6,r7
0002ca  b2b4              UXTH     r4,r6
;;;840    
;;;841      /* Get the SPI/I2S IT mask */
;;;842      itmask = SPI_I2S_IT >> 4;
0002cc  110b              ASRS     r3,r1,#4
;;;843    
;;;844      /* Set the IT mask */
;;;845      itmask = 0x01 << itmask;
0002ce  2601              MOVS     r6,#1
0002d0  409e              LSLS     r6,r6,r3
0002d2  b2b3              UXTH     r3,r6
;;;846    
;;;847      /* Get the SPI_I2S_IT enable bit status */
;;;848      enablestatus = (SPIx->CR2 & itmask) ;
0002d4  8896              LDRH     r6,[r2,#4]
0002d6  ea060503          AND      r5,r6,r3
;;;849    
;;;850      /* Check the status of the specified SPI/I2S interrupt */
;;;851      if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
0002da  8916              LDRH     r6,[r2,#8]
0002dc  4026              ANDS     r6,r6,r4
0002de  b116              CBZ      r6,|L1.742|
0002e0  b10d              CBZ      r5,|L1.742|
;;;852      {
;;;853        /* SPI_I2S_IT is set */
;;;854        bitstatus = SET;
0002e2  2001              MOVS     r0,#1
0002e4  e000              B        |L1.744|
                  |L1.742|
;;;855      }
;;;856      else
;;;857      {
;;;858        /* SPI_I2S_IT is reset */
;;;859        bitstatus = RESET;
0002e6  2000              MOVS     r0,#0
                  |L1.744|
;;;860      }
;;;861      /* Return the SPI_I2S_IT status */
;;;862      return bitstatus;
;;;863    }
0002e8  bdf0              POP      {r4-r7,pc}
;;;864    
                          ENDP

                  SPI_I2S_ClearITPendingBit PROC
;;;882      */
;;;883    void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
0002ea  b510              PUSH     {r4,lr}
;;;884    {
;;;885      uint16_t itpos = 0;
0002ec  2200              MOVS     r2,#0
;;;886      /* Check the parameters */
;;;887      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;888      assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
;;;889    
;;;890      /* Get the SPI IT index */
;;;891      itpos = 0x01 << (SPI_I2S_IT & 0x0F);
0002ee  f001040f          AND      r4,r1,#0xf
0002f2  2301              MOVS     r3,#1
0002f4  40a3              LSLS     r3,r3,r4
0002f6  b29a              UXTH     r2,r3
;;;892    
;;;893      /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
;;;894      SPIx->SR = (uint16_t)~itpos;
0002f8  43d3              MVNS     r3,r2
0002fa  8103              STRH     r3,[r0,#8]
;;;895    }
0002fc  bd10              POP      {r4,pc}
;;;896    /**
                          ENDP

0002fe  0000              DCW      0x0000
                  |L1.768|
                          DCD      0x40013000
                  |L1.772|
                          DCD      0x40003800
                  |L1.776|
                          DCD      0x40003c00
